Senior Synthesis & Static Timing Analysis (STA) Engineer - Bali, Indonesia

ByteDance ยท ๐Ÿ“ Canggu, Ubud, Denpasar, Jimbaran, Nusa Dua, Kuta, Badung ยท Diposting 2026-10-09
FULL_TIMEโญ TERVERIFIKASI
IDR 500000000 - 1200000000
ByteDance is seeking a highly skilled Senior Synthesis & Static Timing Analysis (STA) Engineer to join our team in Bali, Indonesia. This role is crucial for ensuring the efficient design and optimization of our digital systems. The ideal candidate will have a strong background in hardware design and a passion for innovation. Join us and contribute to the development of cutting-edge technology in a vibrant and dynamic work environment.

๐Ÿ“‹ Tanggung Jawab Pekerjaan

Conduct synthesis and STA for complex digital designs.,Optimize design performance and power consumption.,Collaborate with cross-functional teams to meet project milestones.,Develop and maintain design methodologies and best practices.,Provide technical guidance and mentorship to junior engineers.,Stay updated with the latest advancements in synthesis and STA tools and techniques.,Participate in code reviews and design critiques to ensure high-quality deliverables.,Troubleshoot and resolve design issues to ensure on-time project delivery.

๐ŸŽ“ Kualifikasi & Syarat

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.,5+ years of experience in synthesis and STA for digital designs.,Proficiency in synthesis and STA tools such as Synopsys, Cadence, or Mentor Graphics.,Strong understanding of digital design principles and methodologies.,Experience with FPGA and ASIC design flows.,Excellent problem-solving and analytical skills.,Strong communication and collaboration skills.,Ability to work in a fast-paced, dynamic environment.

๐Ÿ› ๏ธ Keahlian

Synthesis and STA tools (SynopsysCadenceMentor Graphics)Digital design principles and methodologiesFPGA and ASIC design flowsProblem-solving and analytical skillsTechnical documentation and presentation skills
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